Customer Publication

A Hardware Acceleration Platform for Digital Holographic Imaging

Authors: T. Lenart et al.

Journal: Journal of VLSI Signal Processing Systems (2008)

Institution: Lund University

Research Areas: Digital holographic technology

Summary: This paper presents a hardware acceleration platform for image reconstruction in digital holographic imaging. The hardware accelerator executes a computationally demanding reconstruction algorithm that transforms an interference pattern captured on a digital image sensor into visible images. The focus of this work is to maximize computational efficiency and to minimize the external memory transfer overhead, as well as required internal buffering. The custom hardware accelerator, extended with a microprocessor and a memory controller, has been implemented on a custom-designed FPGA platform and integrated into a holographic microscope to reconstruct images. The proposed architecture targeting a 0.13 µm CMOS standard cell library achieves real-time image reconstruction with 20 frames per second.

Read the article …

Phase Holographic Imaging PHI AB
Skiffervägen 48
224 78 Lund
+46 46 38 60 80

Phase Holographic Imaging PHI Inc.
265 Franklin Street Suite 1702
Boston, MA 02110
+1 617-963-5150


VAT: SE556542781101

Securities Identification

ISIN: SE0005504636
LEI: 549300JZR79QYESM6296

HoloMonitor® is a registered trademark
Copyright © 2012-2021
Phase Holographic Imaging PHI AB

Phase Holographic Image logo in white

PHI Theme 3.12.2